/*-----------------------------------------------------------------------*/
/*   Mach64 register definition file M64REGS.H                           */
/*                                                                       */
/*   Not all Mach64 registers are included.                              */
/*                                                                       */
/*   This file is part of the Mach64 library for DJGPP                   */
/*   All information is taken from the VGADOC4B package.                 */
/*                                                                       */
/*   Andreas Leipelt,  Hamburg April 1997                                */
/*   Please send comments, suggestions, bug reports etc. to              */
/*   leipelt@math.uni-hamburg.de                                         */
/*-----------------------------------------------------------------------*/
#ifndef __M64REGS_H__
#define __M64REGS_H__

#define Config_Ctrl              0x6AEC
#define Crtc_H_Total_Disp        0x02EC
#define Crtc_V_Total_Disp        0x0AEC
#define Crtc_V_Sync_Strt_Wid     0x0EEC
#define Crtc_Vline_Crnt_Vline    0x12EC
#define Crtc_Off_Pitch           0x16EC
#define Crtc_Int_Cntl            0x1AEC
#define Crtc_Gen_Cntl            0x1EEC
#define Ovr_Clr                  0x22EC
#define Ovr_Wid_Left_Right       0x26EC
#define Ovr_Wid_Top_Bottom       0x2AEC
#define Cur_Clr0                 0x2EEC
#define Cur_Clr1                 0x32EC
#define Cur_Offset               0x36EC
#define Cur_Horz_Vert_Posn       0x3AEC
#define Cur_Horz_Vert_Off        0x3EEC
#define Scratch_Reg0             0x42EC
#define Test_Reg0                Scratch_Reg0
#define Test_Reg2                Scratch_Reg0
#define Test_Reg4                Scratch_Reg0
#define Test_Reg5                Scratch_Reg0
#define Test_Reg7                Scratch_Reg0
#define Scratch_Reg1             0x46EC
#define Test_Reg1                Scratch_Reg1
#define Test_Reg3                Scratch_Reg1
#define Test_Reg6                Scratch_Reg1
#define Clock_Cntl               0x4AEC
#define Bus_Cntl                 0x4EEC
#define Mem_Cntl                 0x52EC
#define Mem_VGA_Wp_Sel           0x56EC
#define Mem_VGA_Rp_Sel           0x5AEC
#define Dac_Regs                 0x5EEC
#define Dac_Cntl                 0x62EC
#define Gen_Test_Cntl            0x66EC
#define Config_Chip_ID           0x6EEC
#define Config_Stat0             0x72EC
#define Config_Stat1             0x76EC

#endif